2.3.7. Opcodes | Table of Contents | 2.3.9. Opcode Mnemonics |
8-bit: | AL BL CL DL AH BH CH DH |
16-bit: | AX BX CX DX SI DI BP SP |
32-bit: | EAX EBX ECX EDX ESI EDI EBP ESP |
Segment: | CS DS ES SS FS GS |
8087: | ST |
Control: | CRn |
Debug: | DRn |
Test: | TRn |
Base + Index * Scale + Displacementwhere Base is any of the 32-bit registers, Index is any 32-bit register but not ESP, and Scale should be 1,2,4, or 8. Finally, the Displacement is a 32-bit integer quantity.
[EAX+EBX] | ok |
[EAX+EAX] | ok, EAX is both base and index. |
[ESP] | ok, ESP is index, no base. |
[EDX*2] | ok, use this to index a global array of words. |
[EAX*4+EBP] | ok, use this to index a local array of longints. |
[SI] | ok, but is likely to lead to hard-to-find bugs. |
[ESI+BX] | illegal, mix of 16- and 32- bit registers. |
[SI*4] | illegal, 16-bit registers cannot be scaled. |
[ESP*4] | illegal, ESP cannot be an index. |
2.3.7. Opcodes | Table of Contents | 2.3.9. Opcode Mnemonics |